Precision Innovations is proud of achieving key milestones in its mission to make OpenROAD industry-ready in 2023 !

Precision Innovations is proud of achieving key milestones in its mission to make OpenROAD industry ready in 2023 ! From tapeouts in silicon, customer deployments and significant tool updates to OpenROAD !

OpenROAD 2023: A Year of Expansion

Goodbye 2023! Hello 2024! Greetings and a Happy New Year from the Precision Innovations team and The OpenROAD Project! Together, we enable innovation, learning, and building chips with lowered barriers of cost, access and expertise. This has been the mission and focus of the OpenROAD project since its inception in the DARPA IDEA program. Thank you to all for your engagement and support, and looking forward to your ongoing contributions!

2023 has been a year of expansion for OpenROAD across many areas: more tapeouts in silicon, more deployments toward education and workforce training, and many important tool enhancements.

Here, we overview important milestones achieved in 2023 and OpenROAD’s plans for 2024.

Tried and Tested for Real-world Applications

OpenROAD has been used for 600+ tapeouts in the Google OpenMPW shuttle program and the Efabless Chipignite program. These include many RISC-V based SoC designs using the OpenROAD-based flows OpenROAD-flow-scripts (ORFS) and OpenLane.  The combined benefits of an open processor ISA, open-source tool integration, and low costs of hardware development have enabled applications – from IoT and sensors to advanced processors and hardware accelerators – across a wide range of functions and technology nodes.

The true test of open-source tools like OpenROAD is how they apply and perform in the real world. A notable application is building hardware security and root-of-trust designs. The following are two example designs using OpenROAD-flow-scripts.

  • Root-of-trust.  Mehdi Saligane of the University of Michigan has taped out an Intel 16nm-based SoC containing digital and analog components such as a hardware security block, a processor and a temperature sensor. Specifically, the AES crypto core, the Ibex RISC-V processor, and the temperature sensor were built using OpenROAD and ORFS. Details will follow in a separate blog.
  • Trusted microelectronics is an initiative of HEP-Alliance, a group funded by the German government.  The initiative develops trusted security hardware, with strategic use of OpenROAD and other open-source tools, along with a resilient supply chain. Their design consists of a RISC-V core, VexRiscv, extended with masked AES as well as a large-number multiplication unit with eight 32KiB SRAMs. VE-HEP taped out their third update of this design in December 2023. Details will follow in a separate blog. 

Advancing Energy-efficient Processors Using Open-Source Design

Semiconductor startups are starting to leverage open-source tools to realize their designs. With OpenROAD, they gain the benefits of low cost, rapid innovation, transparency and expert support from Precision Innovations.

As one example, Ascenium deployed OpenROAD to develop energy-efficient designs for their General Purpose Processor using a 7nm ASAP7 PDK. Early and rapid microarchitectural exploration is key to their design strategy for development of high-performance, energy-efficient processors with significantly lower costs and greater efficiency than what is possible with commercial EDA tools. The Ascenium team is beginning to see significant progress in the tool usability, stability, and the rich features in the GUI needed to support their differentiated flow and design targets. Øyvind Harboe, VP of Engineering, has been spearheading this effort through an efficient support model with Precision Innovations; he engages proactively in a test-feedback-fix cycle that has been a win-win for all – Ascenium, Precision Innovations, the OpenROAD tool, and the user community at large. Harboe has pioneered a paradigm-shifting approach to designing stringent processor requirements for AI and other advanced applications, enabled by OpenROAD. He remarks: 

“OpenROAD has made a quantum leap in terms of scalability and stability in 2023. We use Bazel with OpenROAD-flow-scripts to enhance the productivity and efficiency of our workflows as we run multiple experiments, continuously integrate and test design changes. We are seeing many improvements overall in terms of the ability to handle large designs with complex macros, constraints that must be managed across the design hierarchy and efficient placement of specialized instances such as large arrays of standard cells. We look forward to enhancements to CTS, hierarchical timing analysis and other features like the automatic macro placement in OpenROAD to get to the superior performance and power targets that our processors deliver over conventional CPU architectures.”

We expect other semiconductor startups to use OpenROAD and gain similar advantages of cost and schedule by combining the best of open-source and commercial EDA tools.

Scaling Education and Workforce Development

OpenROAD is now a leading platform and on-ramp for VLSI education around the world. OpenROAD-based courses and training are the standard for barrier-free and hands-on education and workforce development across many institutions.  Importantly, this supports both growth and stability of semiconductor economies across the entire ecosystem.

Much progress has been made to build scalable and flexible courses, workshops and training programs to serve a wide range of learners, including high schoolers, undergraduates, advanced postgraduates, (Master’s and Ph.D.) and summer interns.

The following are some key highlights:

Austin Rovinski, an original member of the OpenROAD project and ongoing contributor, is an Assistant Professor in the ECE Department at NYU. He has put together an SoC design course as part of a series that uses open-source tools, focusing on the prototyping and evaluation of SoC designs. He notes:

“The goal of this course is to put students in a hardware startup or academic lab context. The key to success in both contexts is prototyping and evaluating solutions that address valuable needs. Therefore, students will learn about how to brainstorm, prototype, and evaluate hardware-based solutions using agile methodologies. FOSS tooling like OpenROAD will be incredibly important for these efforts, as I fully expect students to be able to take their experience from this course and use it to form a startup company if they desire.”

Continuous Development and Innovation

OpenROAD aims to break down barriers to chip design costs and innovation. This calls for continuous improvements to the application and flow capabilities with an ongoing focus on ease-of-use, PPA and access to resources such as training and documentation. The following is a summary of key enhancements to OpenROAD in 2023:

  • Ease-of-use, fast installation and setup to run the flow.
    • Significant improvements have been made to the installation process and our enhanced documentation for multiple hardware setup options.
    • Precision Innovations makes pre-built binaries available based on nightly builds that users can directly use without the need to build locally.
  • A real-time dashboard is available to customize and track key metrics for design quality: https://dashboard.theopenroadproject.org
  • New PDK enablement in ORFS.
    • HEP has added support for a public PDK for IHP to support their 130nm process technology, as part of the above-mentioned government-backed initiative for Trusted Microelectronics development based on OpenROAD and other open-source tools.
    • OpenROAD now supports a private PDK from SCL. This PDK will foster research, education, and the growth of a future semiconductor ecosystem in India. Such a technology base is important to regional semiconductor economies that depend on trusted microelectronics and a resilient supply chain using their own foundries.

Key Functionality Updates

The following are some highlights of features and fixes to OpenROAD and OpenROAD-flow-scripts aimed at improving design flow efficiency and accuracy.

  • Standard-cell placement and resizing now supports multi-height cells and hybrid rows
  • Support for vector-based power consumption calculation
  • Numerous improvements to the IO pin placer
    • Mirroring constraints
    • Simulated annealing solver for highly constrained designs
  • Resizer improvements in multiple areas
    • Vt swapping
    • Gate cloning
    • Pin swapping
    • Power recovery
  • Support for post-global-routing timing repair with incremental global routing
  • Improved timing-aware global routing, with updating of net priorities during global routing to account for detouring
  • Support for placement regions in global placement
  • GUI rendering allows for interrupting to improve responsiveness
  • Improved CTS obstacle avoidance and usability
  • OpenROAD: 1,019 PRs merged;  315 issues closed
  • OpenROAD-flow-scripts: 487 PRs merged; 112 issues closed
  • OpenROAD has now had more than 20,000 commits!

What’s Ahead?

OpenROAD continues to support more silicon deployments and to make the tool and flow robust and ready for industry applications. This has been well-supported by Precision Innovations for our early adopters. The OpenROAD Initiative was launched in 2023 with the goal of further democratizing chip design through active engagement with industry and academia. This non-profit foundation’s initial focus is to broadly support and foster education and workforce initiatives for EDA and semiconductor design.

Our roadmap includes improving the accuracy of advanced analysis (timing, noise, crosstalk). Notably, addition of CCS model support is in progress. For design creation, clock tree synthesis is being enhanced to support more complex design structures with improved usability and optimization QoR. The project team also plans to broaden support for routing capabilities to support advanced nodes <12nm. Finally, OpenROAD is entering the realm of ML and GenAI: a chat assistant and the use of ML-based analysis (IR drop, detailed routing, etc.) are being developed.

So stay tuned and connected! Please get involved and reach out if you are interested in advancing the OpenROAD tool or contributing to any of the project’s initiatives:

info@precisioninno.com

https://theopenroadproject.org/contact-us/

Osama Hammad

Osama Hammad is a dedicated Software Developer at Precision Innovations Inc., contributing to the OpenROAD project. He holds a Bachelor’s degree in Computer Engineering from the American University in Cairo, graduating with highest honors.

Osama specializes in maintaining the Detailed Routing Module for OpenROAD, where he has implemented distributed routing solutions, integrated new platforms, and developed essential database management tools. His background includes roles in embedded engineering, digital design, teaching, and project management.

Cho Moon brings over 25 years of experience in Electronic Design Automation (EDA). He has led advanced technology node development for industry-leading tools such as PrimeTime, Fusion Compiler, and First Encounter at Synopsys, Blaze DFM, Cadence, and other prominent EDA and semiconductor companies.

He is proficient in static timing analysis, pre-route and post-route optimization, Engineering Change Order (ECO), logic synthesis, and formal verification. Cho excels at collaborating across functional teams to deliver innovative solutions.

He holds a PhD from the University of California, Berkeley.

https://www.linkedin.com/in/cho-moon/

Eder Monteiro is a Software Engineer at Precision Innovations and is involved in the OpenROAD project. He has worked on the OpenROAD project since 2019, and in these years, he has developed or supported several tools.
 
With seven years of experience in EDA, Eder has expertise in databases, pin placement, routing, and software architecture. Eder has a Bachelor’s in Computer Science from the Federal University of Rio Grande do Sul (UFRGS).
Tom-Spyrou

Tom Spyrou is the CEO of Precision Innovations Inc and is the chief architect and technical program manager for the OpenROAD™ system. Tom is a well-known EDA system architect. He was most recently a Senior Principal Engineer in Intel’s Programmable Solutions business unit working on the Quartus FPGA compiler.

Tom has worked for over 30 years as an EDA Technologist and has gained extensive experience in areas including Static Timing Analysis, Logic Synthesis, Power Grid Analysis, Database Technology and Floor-planning.

He has led the development of leading-edge commercial engines and products such as PrimeTime, Voltage Storm, First Encounter, and the Open Access Database.

Tom has been driving EDA algorithms to utilize parallel programming approaches with both multi-process and multi-threaded techniques. He has a BS from Carnegie Mellon University in ECE and an MS from Santa Clara University.

linkedin.com/in/tomspyrou